You are here

PSOC 5LP interrupt and ADC | Cypress Semiconductor

PSOC 5LP interrupt and ADC

Summary: 2 Replies, Latest post by danaaknight on 16 May 2015 06:10 PM PDT
Verified Answers: 0
Last post
Log in to post new comments.
CoMaster's picture
4 posts

 Hi everyone
I want to ask if I am able to trigger an interrupt when the output of ADC is greater than specific Value.

Thanks all,

user_1377889's picture
9284 posts

Not in the PSoC5 world, but with a PSoC4 you can trigger an interrupt when ADC is out of given limits.

Alternatively you may use a comparator fed by a DAC to trigger an interrupt in PSoC5.



user_14586677's picture
7646 posts

Depends on the resolution / accuracy of the trip point you need.

VDAC is limited to 8 bits.


The following methods only limited by A/D resolution and signal path

errors like Vref accuracy and A/D offsets, non linearities....


One approach would be DMA the A/D result to a register and use either

LUTs or digital comparator to generate ISR. 


Or use a timer / counter, dma to the count register, and use compare output and

register to initiate an ISR.


Or create a custom component.


Regards, Dana.

Log in to post new comments.