PSoC 5LP (CYC5868AXI-LP35): Using P1 as a GPIO | Cypress Semiconductor
PSoC 5LP (CYC5868AXI-LP35): Using P1 as a GPIO
In the System tab I set Debug Select to SWD (serial wire debug). When I build the project, I get this message: "Note: debugging option SWD has been changed to SWD+SWV in the System design-wide editor.".
It prevents me from using P1 as a GPIO.
Why can't I use SWD without SWV? How can I disable that automatic change?