Proper DMA Operation | Cypress Semiconductor
Proper DMA Operation
I am attempting to transfer data from an ADC, to a filter bank, and then to SRAM usign DMAs. I started the project by using the filter bank example project. Data does move through each perepherial however the results being written to memory are incorrect.
Please assist me in correcting the DMA configuration (or other flaws) that are causing the weird behavior. The program is setup right now so a break point hits after the data buffer fills off the filter.
Attached is the project.