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multilevel triangle carriers

Summary: 6 Replies, Latest post by Dimz_Vonz on 23 Nov 2016 03:26 PM PST
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Dimz_Vonz's picture
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Hello everyone! 

I just got in my hands, my first ever dsp to use! As I am clueless in z-domain applications, I would like some of your insight. 

I would like to compare a sinusoidal voltage reference to multiple amplitude triangle carriers in order to create a multilevel PWM. (i hope the pic helps a bit). And if it is achievable to do it only through the registers as the manipulation of the voltage reference need to be accessed from other functionalities as well. I found a bit tricky to create these so called multilevel carriers.

Therefore i would much appreciate any kind of help.

/Dimz

​(i apologies for any miss concept that i may have used, still trying to get into the dsp mentality :) ) 

 

 

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user_342122993's picture
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579 posts

What sine and PWM frequency range do you expect? Where sine comes from?

Dimz_Vonz's picture
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Hi odissey1,

The sine will be externally fed at 50 Hz from a wave generator. The sine should have a resolution of 10kHz, thus the PWM should be about 20 times faster so there would be no misses between the transitions. I know that the pic that i uploaded was in an analog concept, so I am wondering how I can implement the same in PSOC. 

user_342122993's picture
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There are 10 levels to compare, so it has to be done through code or hardware. Easyest approach would be is to directly digitize the sine using ADC_SAR at 200kHz, and update PWMs compare reg depending on measured value and comparison levels. At 200kHz sampling rate it is doable.
Some workaround required with PWM, as it can be set either 100% off (99.5% on) or vice versa, and you likely want it all way off/on. I will think about it.
BTW what bit resolution required from sine and PWMs?

Dimz_Vonz's picture
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Thank you odissey1 for your remarks. As you said, by comparing the reference sinusoid voltage to certain threshholds and then wiring the high/low output to a pwm block does the trick. 

PSOC seems that can handle quite a lot of computational effort. This just saved me from being involved with VHDL O.o.

Many thanks! 

/Dimz

user_342122993's picture
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579 posts

Can you provide some link to learn more about this "multi-level PWM"?

Dimz_Vonz's picture
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Multilevel PWM is a part of the lower level controls of  the so called multilevel converters (voltage controlled converters) which have reduced THD and have reduced requirements on filters ( search for: HVDC MMC). 

This  should be quite thorough and cover quite a few of the subject (has nice appendix):

http://vbn.aau.dk/files/17643910/Project_1030.pdf

/Dimz

 

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