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MLOGIC_DEBUG digital routing and NVL-DPS | Cypress Semiconductor

MLOGIC_DEBUG digital routing and NVL-DPS

Summary: 1 Reply, Latest post by Bob Marlowe on 05 Sep 2014 03:37 AM PDT
Verified Answers: 0
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ado's picture
23 posts

I am not sure whether this is a PSoC 5LP programming, architecture or PSoC Creator question.

In our design we have very few external pins that we can use for debugging.

My understanding of the documentation is that the "dis_dbg_prt bit"  of the MLOGIC_DEBUG register

is a "run-time" overwrite of the DPS bits in the Non-volatile latches.

What I want is the NVL-bit to be in debug port setting (default setting 01 = 4-wire jtag), but I still want to route

signals in the schematic from the pins p1[0] - p1[3].

This part of the schematic would only be activated by writing the MLOGIC_DEBUG register and thereby turning the

pins into GPIO.

Is that technical possible, or do I misinterpret the documentation, and if, how do I do that in PSoC Creator, which

does not allow assigning the debug pins as long as in system-wide setting the debugging mode is selected.



user_1377889's picture
9294 posts

I would suggest you to create a MyCase and having answered your question from a Cypress engineer.

On top of this page: Support & Community -> Technical Support -> Create a MyCase



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