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Memory Virtualisation/Protection | Cypress Semiconductor

Memory Virtualisation/Protection

Summary: 0 Replies, Latest post by mxy on 29 Oct 2013 08:50 AM PDT
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mxy's picture
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Hi all

We're evaluating the PSoC5, having a great time learning about it so far.


I've had a good look at (and inside) the EMIF block, but I wonder we can do a little more. 

- Anybody have experience with adding memory protection?

- What about virtual memory? That is, paging in from an EMIF. 

- What memory mapped external ram which is accessed via SPI (so we don't waste 48 pins on memory)?


The main roadblock seems to be this: How do we get access to the address bus (and data bus) when the address is in say the 'external ram' range? We want to decode it and work our magic on it when this is the case.


One ugly way of doing this could be to 'hijack' the macros "CY_GET_XTND_REG8()" and "CY_SET_XTND_REG8()" and do everything in the CPU (or start there and send off to a UDB). But I wonder if there's a way to get access to the address & data buses in say a UDB? 

We found the "EMIF_Port" primative and that seemed interesting, but that looks like a dead end: my interpetation of the docs is that it merely configures ports/pins to read the address/data bus from the PHUB and there's no way to route that anywhere else (plus sometimes we want to avoid wasting those pins in the first place)


Looking forward to learning more about this little powerhouse...



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