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IO switching frequency on PSoC-5LP | Cypress Semiconductor

IO switching frequency on PSoC-5LP

Summary: 2 Replies, Latest post by hli on 03 Jun 2013 07:23 AM PDT
Verified Answers: 0
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Hoong Fai's picture
4 posts


May I know what is the max switching frequency that GPIO pins on a PSoC-5LP device can support? I want to provide external clock source to PSoC ADC and some registers.

Thank you.


user_14586677's picture
7646 posts

Take a look at page 10 -    AN72382


Regards, Dana.

user_78878863's picture
2551 posts

Remember that the ADC can only take up to 18MHz as clock. You configure (in the design wide resources) one signal (which must exist and be named in the schematic) as clock source, That makes it easier to use it in your project.

Note that in this case, you cannot use the full 18MHz for the ADC, as you will get an error when compiling the project (the handling of the accuracy of the provided ADC clock seems to be wrong).

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