# Cypress Developer CommunityTM

## How to implement Sequential Equivalent Time Sampling on PSoC5 board?

Summary: 13 Replies, Latest post by tdms12 on 28 Nov 2013 08:05 PM PST
User
22 posts

Hi, Guys. I'm currently doing a project by using PSoC5 board.

My object is to sense an analog signal, convert the signal by using ADC, and finally send the data to my PC.

I have solved the data transfer part by using USBUART but I'm trouble in sampling a signal whose frequency is much higher than the sampling rate of ADC_DelSig.

I've heard that Sequential Equivalent Time Sampling can be used in this kind of situation, but do not have any idea to implement thid method.

Any help will be appreciated.

Thanks.

User
866 posts

Hi tdms12

How is frequency of your signal? you want to measure.

I guess you want to measure high-frequency signal doing like a sampling scope. right?

User
22 posts

The frequency range of target signal is 10~100kHz.

Since I want to use 16bit resolution, the range of ADC_DelSig's sampling rate is 2000~48000sps.

Yeah, you're right. I want to measure high-frequency signal like an oscillioscope.

Thanks.

User
9294 posts

You have to make some timing considerations. Smallest sample-rate is Nyquist, which is 2*f = 200 kHz but that will not give you a smooth curve like a sin-wace on an osc. Oversampling should be at lest 10, so 10*f will give a rough curve.

The next problem is: How to get that  over the wire to the PC? 2 Bytes per sample, 12 bits per byte (YES, 12! Start, stop and parity) would need a transfer clock of 24 * SampleRatre and an UART clock should be driven 8 times baudrate...

So it turns out that you need a buffer for your values from which you transfer....

Bob

User
22 posts

Thanks Bob. But I cannot use oversampling because of limited sampling rate of Adc_DelSig.

Thus, I want to use sequential equivalent time sampling method and do not know how to implement this method on PSoC5.

And communication between PSoC and PC is not a problem for me.

User
866 posts

I think, that would be better direct measurement

rather than sampling method.

To scoping the analog signal needs 5 to 10 times of actual signal for sampling rate.

So consider max sampling rate, DelSig ADC: 48k/16bit, 192k/12bit, 384k/8bit

SEQ-SAR: 25k/12bit, 320k/8bit

Besides, you say 16bit but I thing 16bit might be over spec for your measure or observing the signal.

And besides, SAR-ADC is meets for this purpose, cause of settling time.

And I think, Sampling method is great but implementation is hard to do, I presumed.

User
22 posts

Dear, Bob. I couldn't agree with you more but implementation of ETS is the prime object of this project.

Also, it is possible that the target frequency range can be increased to 1MHz.

User
7646 posts

ETS has been around for a lonmg time. Take a look at this Tek reference, you can get an idea of how to approach it.

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http://www.tek.com/document/application-note/real-time-versus-equivalent-time-sampling

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http://kb.bkprecision.com/questions.php?questionid=227

http://www.edn.com/electronics-blogs/scope-guru-on-signal-integrity/4311562/Equivalent-time-sampling-versus-real-time-Why-should-you-care-

http://www.edn.com/search?keyword=equivalent%20time%20sampling    Search on Equivalent Time Sampling, several discussions.

Regards, Dana.

User
7646 posts

Keep in mind the constraint is its for periodic signals. Cannot be used on

aperiodic.

Regards, Dana.

User
1362 posts

This may help as well

User
22 posts

Thank you for your replies, Dana and H L. Now I understand the principles of equivalent time sampling.

But I still have questions.

How could I control the time gap between ADC conversions?

According to the datasheet, it seems that ADC continues conversion at the same time interval until ADC_Stop () api stops ADC.

But to implement ETS, it is evident that I have to add small delay between adjacent conversions.

Thank you.