FX2LP based SWD programmer | Cypress Semiconductor
FX2LP based SWD programmer
I have read http://www.cypress.com/?app=forum&id=2232&rID=84336 and http://dangerousprototypes.com/forum/viewtopic.php?t=3105&p=57759 andhttp://dangerousprototypes.com/forum/viewtopic.php?f=56&t=2823&start=30#p30169 but one thing that has not been clearly documented is WHERE this information came from.
I've also read the HSSP app note (AN73054) at http://www.cypress.com/?rID=57435 but this is a more generic document, not a specific document for the FX2LP based programmers.
The CY8CKIT-003 documentation shows the FX2LP connections (PD0 = SWDIO, PD1 = SWDCLK, PB2 = XRES#), but does not document which hex file to load. The CY8CKIT-050 has the same FX2LP schematic.
I'm using one of the LCSoft FX2LP devkits inexpensively available on eBay such as http://www.ebay.com/itm/EZ-USB-FX2LP-CY7C68013A-USB-EEPROM-Develope-Board-Module-Logic-Analyzer-/271218602045. I've used this board in other projects and it works great, the hardware is not broken.
In the PSoC Programmer Service directory I see a number of firmware files:
What is the difference between all of these files? What does _simfw signify? Is DVK the on-board development kit programmer firmware? Is FTK for the first touch kits for PSoC3 and PSoC5? What is the generically-named fx2lp_fw for? The .txt file gives the versions of these files but not what they are intended for.
Is the source for any of these available and if so, where?
Some schematics I've seen have a secondary pair of SWDIO/SWDCK lines at PB0/PB1 and they seem intended for the USB SWD pins on PSoC5. Is this true? Can either pair (PD0/PD1 and PB0/PB1) be used or is the USB SWD connection protocol different?
If I want to program a PSoC5LP with the FX2LP dev kit, which should I use? How about a PSoC42xx?