EMIF confusion | Cypress Semiconductor
I want to connect a 16-bit SRAM to the EMIF of a PSoC 5LP. I'm a bit confused about 8-bit transfers on a 16-bit interface.
EMIF component datasheet states:
"...it should not initiate 8 bit transfers to 16 bit memories"
However, the 5LP technical reference manual says:
"...the PSoC 5LP cannot initiate 8 bit transfers to 16-bit memories and should not initiate unaligned 16-bit or 32-bit transfers to an external memory, as the processor may convert these into multiple 8 bit aligned accesses."
So, the questions are:
1) in general, does it mean that for each variable where a size of 8-bit would be enough a 16-bit variable must be used when EMIF is invoked? -> so, for example, 8-bit arrays for receive buffers or similar aren't possible?
2) the statement from the TRM says that the processor converts unaligned 16/32-bit transfers to 8-bit aligned ones - this could(!) be read as that the processor is able to do a 8-bit transfer... so, is it possible or not?