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DMA channel with 12 bit from ADC SAR to one filter channel | Cypress Semiconductor

DMA channel with 12 bit from ADC SAR to one filter channel

Summary: 19 Replies, Latest post by type18 on 15 Nov 2013 01:10 PM PST
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Dick22's picture
User
3 posts

Hello,

 

I try to built an DMA channel from a ADC SAR to one filter channel it works only for 8 bit.

Kann anyone tell me how to handle 12 bit data stream?

Or may be i don´t now how to read the memory of holding register,

I took the comment " Filter_Read16(Filter_CHANNEL_B)" .

Can somebody help me

Thanks a lot.

Dick22

dasg's picture
Cypress Employee
730 posts

Hi Dick22,

 

If you are using SAR ADC differential configuration, the output will be in 2's compliment form.

So, the 12 bit output should be left aligned (left shift by 4 bits) and fed into the Staging Registers (High Byte and Middle Byte).

You can do this by creating a Custom Component using UDB for shifting.

Dick22's picture
User
3 posts

HI dasq

thank you a lot for this information. Yes I took a SAR ADC but is it not possible in the single mode

I´m sorry but  I don´t know how to create a UDB for this shifting. Will a UDB need CPU resources because I need a datarate with 1000000 samples per second.

dasg's picture
Cypress Employee
730 posts

Hi Dick22,

 

Using UDB for shifting will not use CPU resource once the initializations are done for it.

However I feel that using UDB will have a lot of DMA channels being consumed, as the SAR ADC value has to be transmitted to UDB via DMA, the value has to be  shifted, and then has to be transmitted again using another DMA channel.

This might be a resource consuming solution.

However a workaround for the sign-bit extension in SAR ADC Component will soon be brought about.

MrC
MrC's picture
User
13 posts

Where's the work around? I sure could use it. After spending a solid week trying to do a 12 bit SAR to DMA to Filter it looks like the SAR output is not compatible with the Filter. The SAR ADC only puts out unsigned while the Filter will only receive signed. That was a shock. I had great plans but now it appears to not be possible with PSOC 5. It's now middle 3rd Q 2013. I could use tthe coming soon work around.

MrC

user_14586677's picture
User
7648 posts

Not sure if this is applicable, but seems to be a workaround used to avoid

sign bit -

 

www.cypress.com/    EP58353

 

Regards, Dana.

user_14586677's picture
User
7648 posts

Take a look at this as well -

 

www.cypros.org/

 

Regards, Dana.

MrC
MrC's picture
User
13 posts

Thanks Dana for the info. I've read them and managed to succeed with a 16 bit DelSig to dma to filter to sram buffer working flawlessly.
But when I change to the SAR ADC, I can't get good data out of the filter. I would like to see one example of an 12 bit SAR to DMA to filter to DMA to SRAM that works. 8 bit examples but never a 12 bit. I've spent over 2 weeks trying everything and I've learned a lot but not how to do it with the 12 bit SAR. Any working examples out there?

user_14586677's picture
User
7648 posts

Then I would advise you post a tech case at -

 

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www.cypress.com

“Support”

“Technical Support”

“Create a Case”

 

Refer to this thread. And post your project with the case.

 

Regards, Dana.

hli
user_78878863's picture
User
2759 posts

You can look at AN61102 (http://www.cypress.com/?rID=44335 ), which has a chapter about how to connect DMA to a 12bit-SAR-ADC. It has been updated to reflect PSoC5LP, but this should work on the PSoC5 too (though I still recommend updating to 5LP...)

MrC
MrC's picture
User
13 posts

Well, 3 weeks of fussing to get an 12 bit sar to dma to filter to dma to sram working and I finally sorted it out. It's now working perfectly filling 2 ping-ponging uint16 buffers of 256 ea. The main cause of the problem is the debugger! I should have known. The strange thing was the debugger showed no problem with a 16 bit delsig running 10000sps. crank it up to 20000sps and everything goes sour according to watches of the 2 buffers. Evidently the combination of the filter to DMA goes bonkers when halting sending garbage to all the addresses stored in the TD's. It really looked bad with the SAR evidently because of the higher sample rate. Attached are pictures of the bonked watch window data and the data as it really is(double buffered the address being unknown by the TD's.

Lesson learned......Don't trust everything you think the debugger is showing you.

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