# Cypress Developer CommunityTM

Summary: 6 Replies, Latest post by hli on 27 Jun 2013 02:20 PM PDT
User
10 posts

Hi,

I'm trying to implement a project involving an ADC, DMA and VDAC. The incoming voltage is in the form of a sinusoid, lying in the range +-  20mV centered at 0, with a frequnecy of 3KHz. However, when this is input to the ADC (of type Delsig, in differential mode of range +-2.048V with a sampling resoultion of 8 bits), out come of the VDAC (of range 0-4.080V) a voltage of peak 3V. Same is the case when there is 0 input but still the peak 3V out of VDAC. Is this due to the fact that my input peak voltages are very low? The project  works fine when my input voltage lies in the range 0-3V. How can I get around it? Thank you!

Karun

User
7646 posts

inputs in it's CM range, namely Vssa to Vdda.

To offset a ground referenced signal an easy method using 2 R's is

electronicdesign.com/analog/use-excel-calculate-d-level-shifter-resistor-values

Regards, Dana.

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User
7646 posts

Try again

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User
2546 posts

I don't understand the situation: you say that with a signal from -20mV...+20mV you get a 3V signal on your DAC, even when the input it is zero volts (tied to ground). Yet then you say that with a signal from 0..3V it works, but you also say that the input range of your ADC is only 0..2.048V.

So this seems like different stages of your project yield different results. So can you clarify what you did, how you measured and what were the results?

It might be a good idea to remove the DMA from your setup in a first step. That way you can check what values get measured by the ADC (e.g. sending them to a LCD). Only when you get it working add the DMA back in - this duces the number of potential error sources...

Can you post your project so we can have a look at it ("create workspace bundle")?

Techniques for working with negative voltages. http://www.cypress.com/?rID=50815&cache=0 (even though its for the PSoC1, most of it applies to the PSoC5 too)

User
10 posts

I'm sorry for the discrepancy:

For the signal lying in the range 0-3V, I had my ADC set to an input range of +-6.144V and for the +-20mV, a  range of +-2.048V.

When there is non input to the ADC, the DAC outputs a voltage equal to the maximum of its configured range. For instance if the VDAC is set to a range of 0-4.080, a voltage of 3.121(~4) and for 0-1.020, a voltage of 1V respectively.

Since my intended signal is very close to 0 (and lesser), the ADC takes it as a negative value and out come of the VDAC its maximum, a 1 or 4 V, not able to distinguish between no signal and a signal very close to 0.

So as  Dana suggested, before feeding the +-20mV (AC signal) into the ADC, I might have to offset the signal to a level beyond 0, such that its between Vssa and Vdda. Is it possible to implement this on PSoC itself, say by the use of Opamps or PGA rather than having external resistors and capacitors? Shouldn't I be able to use Level shift mode of the buffer as it can go down all the way to -100mV? Thank you!

Karun

User
7646 posts

I was not aware of buffer shift option, I would use that. Note it has limited

shift, so if you had to shift, say by a volt or two, 2 external R's is a simple

approach. Its only limitation is that if you need absolute accuracy in the

shift that approach is dependent on Vdda/Vddd (depending on what you

terminate to).

Regards, Dana.

User
2546 posts

When you say "no input" do you mean "unconnected" or "connected to ground" or "both inputs connected together"? The former can result in noise which can return basically anything, the second one depends on which of the both inputs is connected to where, and the latter one should always return 0.

But when you using the differential mode for the DelSig ADC, negative signals are expected, and don't result in MAXINT as result - they just return negative integer (so the result needs to be treated as signed int).

When you are expecting such small input values, why don't you use the VRef/16 input range? It gives a range of just 64mV above and below the negative input, which seems what you need. Together with the level shifting buffer option it seems like what you need.

But again, for debugging purposes, try to get the raw values produced by the ADC. Otherwise, it might easily be that the DMA or the DAC is the culprit. Make your life easier by reducing the scope of what you need to look at (divide et impera, as the old Chinese already knew :).