accessing memory from verilog component | Cypress Semiconductor
accessing memory from verilog component
I've found a few threads on this but none of the ones I've seen lead me in any direction.
Is it possible to access sram directly from a verilog component? if not is it possible to do it with the DMA? If so could someone please provide some instructions so I can start looking into it?
I'm interested in doing some calculations with the cpu and then taking that array and passing it to the verilog component.
I know this can probably be done with an api, but is that the only way? I imagine this would be slow since it would be transferring the data rather than sharing its address, and I would be passing a large amount of data so I'm trying to make it with as little cpu overhead as possible.