9 bit IDAC implementation on PSoC | Cypress Semiconductor
9 bit IDAC implementation on PSoC
AN60305 describes, amongst other things, a "Rail to Rail 9-Bit VDAC with Low Output Impedance", using an IDAC, opamp, and swtiching the polarity of the DAC while creating a waveform. I haven't seen any examples of this, though, and it's not clear to me if this is pracitcal in a manner similar to the WaveDAC component - eg, using DMA with low CPU overhead. Does anyone have any examples of this pattern in use?
Also, the appnote says:
"To ensure the best accuracy, load the proper calibration values when the IDAC direction or range is switched. This can be done with software or DMA."
And the IDAC datasheet says:
"Note When using the ipolarity input to change the IDAC8 polarity, either the Source or Sink mode will no longer be calibrated and could have errors in excess of 25%."
However, I can't find any documentation on how to load calibration values into the IDAC, or on how to determine what values should be loaded.