What are Vih/Vil for SIO input when using Vref? | Cypress Semiconductor
What are Vih/Vil for SIO input when using Vref?
Hi there - first time poster. I'm using a 68-QFN part from the CY8C58LP family.
I would like to use P12 as a rising-edge triggered interrupt. This is an SIO pin whose corresponding bank voltage (VDDIO1) is 3.3V. The source driving this pin is a digital 1.8V.
What I would like to do is use a Vref for the SIO input threshold, and configure the Vref component to Vccd (1.8V SIO Only).
My question is - when using a Vref as an SIO input threshold, what are the relative Vih and Vil voltages?
The "Pin" component datasheet (http://www.cypress.com/file/137401/download) lists on page 31 a few Vih/Vil settings but the GPIO values listed are relative to the VDDIO voltage. If I'm using a reference voltage Vref (instead of the CMOS default), what values can I expect?
Thanks in advance -