Sorry, I hit too many backspaces and the web page posted! No edit button on that one either.
Any way, I wish to connect a VDAC output through an analog mux and stay inside the chip. I've done some googling, and in the PSOC3 family, doesn't seem possible based on forum conversations.
Is it possible with PSoC 5? I would prefer the hardware control signals, but the AHwMux doesn't seem to work.
I've been unable to do it with AmuxHW, I get "net xx is expected to connect to only one GPIO..."
thanks in advance!
The analog muxes of PSoCs connect to GPIO pins only, What exactly do you want to perform, there might be a way out.
This simple example routed (NOT HW mux) -
The HW mux however only routes to GPIO. Note it says in datasheet -
Use an AMuxHw component when you need a signal to be switched in hardware. Currently, only the GPIOs can be multiplexed with this multiplexer
Emphasis on "currently".....
You could "effect" a workaround by using interrupts to control the
non HW mux to make it "look" like a HW mux.
That diagram is exactly what I want to do, except I need to control it from hardware rather than software, so I can get exact 10 us wide pulses.
Yes, the "currently" in the hardware mux is the sticking pointer here.
I have given up and routed out the GPIO pins and used the HW mux so I can get an exact 10us wide pulse (using TC of a down counter).
I'm having issues with the one-shot mode not retriggering the down counter, but I haven't tried all the possibilites on software control of it. I do not yet see an easy way of retriggering once the downcount has occurred once.
Take a look at this thread -
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Regarding 10 uS "exact". You might look at clock inaccuracies to get
an idea of how exact, and then consider using an ISR (and its latency)
with high priority to "effect" a HW mux. Just a thought.
When you sync a 12MHz clock to a 24MHz clock, you might introduce a lot of jitter. I don't think that you will loose pulses, but I think its a stretch. Its better to increase the master clock.
I was able to get what I wanted by going outside the chip and using external pins. With the following configuration, I get a pulse height based on the voltage I put into the VDAC. I had to put an opamp follower on the VDAC, because the VDAC output sagged for about 3 us while the current through the R path to the outside world's new C, charged up the destination capacitance (in my case, scope probes and a BreadBoard socket arrangement). Once I put an opamp follower, the voltage transition was nice and sharp. (The VDAC is essentially an IDAC feeding a resistor with a fixed current. Therefore any abrupt transitions in C that it sees will cause the voltage to sag for a brief period of time, if the outside C's voltage is less than the voltage presented. In this case, the voltage was ground, charging up to VDAC output level.)
The reason I could not get the One Shot Counter to work was because it requires a hardware reset signal to work the second time. The One Shot timer works the first time when Start() is called,which confused me. I read enough of the Datasheet to get started, but not enough to finish. (My fault)
To have the OneShot timer work with TC staying high when terminal count is reached, you have to choose UDB. At that point, you have to hook up Count to your counting clock (in my case 12mhz), and the clock has to be hooked to a true clock source (in my case 24mhz). When you do this, Count does not have to be a clock source, it can be a digital edge. The 24mhz clock then synchronizes to the system clock.
In my project, I got a warning about 12mhz clock being asyncronous due to routing, but in this case, it is not a problem since the 24mhz clock is doing the synchronization.
Update: Sorry, the picture didn't make it, I've enclosed the .png
Attached is the .png update.
@hli, the reason I don't get clock jitter on this is due to the fact the 12mhz clock comes off of the 24mhz clock, and the 24mhz clock will always syncronize within one clock cycle.
There is a piece of info in the middle of the data sheet regarding the Down counter used as a One-Shot, restarting the countdown. In that case, a hardware reset must be applied. You aren't supposed to be able to do it from software.
When I understand that diagram right, you want to generate a 10µs pulse with V(vdac) once every 1ms. You generate that 10µs pulse with the counter, and then reset the counter from an ISR. The pulse then drives the HWMux.
Wouldn#t it be easier when the HWMux is driven from a PWM? Have it run with 24MHz, set the period to 24000 and the pulse width to 240. That gives you the wave form you need.