Is there any way that the count value of the counter be not just one each time but any value. If so how to do that ?
Can you be more specific?
Ie what do you want to counter to do?
What is the input to the counter?
How do you read the counter?
Is this a problem with your project? if yes, could you zip and post the project file as well?
There are several ways you could create a custom modulo counter -
1) Standard counter with ISR triggered read, followed by multiplier of value read.
2) LUT implemented counter.
3) Verilog derived solution.
To name a few.
Actually I wanted a variable value counter. The counter can not only increment by 1 at each clock but user specified value.
Where does this user-defined value come from? How often does it change? It might be easier to just count, and then multiply afterwards.
What is the problem you are trying to solve?
This is basically for frequency divider. Thats the reason I was asking for variable value counter. User can specify the what value needs to be skipped bby the counter.
you can use a counter with TC as the output.
Change the dividiing ration by loading the counter value with Counter_WritePeriod().
Remember that the counter should be n+1, also that you cannot have divided by 1 in this case.
So basically you want to build a phase accumulator? Look here: http://www.cypress.com/?rID=39408&cache=0 to find a component which should do what you need. You will need to rework the component a little bit, since it is intended to use the DMA, but you want a digital output signal.