Status Register v1.80 interrupt can not be enabled | Cypress Semiconductor
Status Register v1.80 interrupt can not be enabled
This is actually a multi-part question/problem.
1. The first issue is the datasheet description for the INTR pin.
1a. The Input/Output Connection section describes the INTR as an output.
intr – Output *
This optional pin is shown on the symbol when the Generate interrupt parameter is enabled.
This option is only valid if less than 8 inputs are selected.
1b. The Parameters section describes INTR as an input.
This parameter displays the interrupt input on the symbol. This option is unchecked by default.
Interrupt is valid only if the number of inputs is less than 8.
1c. Nowhere in the datasheet does it describe what the interrupt does (if it's an input) nor what triggers it (if it's an output)
2. I have the component configured with 7 inputs and the Generate Interrupt check box is enabled. Considering that "Generate Interrupt" infers that the Status Register will initiate/generate an interrupt, so I have the INTR pin connected to an ISR component so I can do something when a status bit changes (assuming the INTR is generated on a change in an input...). However; when I try to call the Status_Reg_1_InterruptEnable() API, PSoC Creator (Version 2.2 Component Pack 6 (18.104.22.1682)) throws out a WARN prj.M0121:statement with no effect.
So, my questions are:
Is the INTR in input or output?
If input, what does it do?
If output, what triggers it?
Why won't the SW let me enable it?