SRAM size | Cypress Semiconductor
I'm new to this part of things so bare with me.
I'm setting up a project, where I will need to monitor at least 3 ADC streams, all coming in via SPI, where I will be doing FFT's on them. Now the size array I need to be doing FFTs on will be 40kBytes, so I can see a 1Hz wave (I'm sampling at 10Khz and have 32 bit depth).
Now this means I will have 120kByes of data at a minimum. way more than the PSoC 5LP has available in SRAM.
What I'm wondering is how should I go about planning to do this? I have never used external ram before but it sounds like this might be my best option. if so, is there a way that I would do the FFT on the data while its actually on the RAM without moving it back onto the SRAM? or would I move it back onto the SRAM before doing the computations?
I figure a possibility would be extending my memory location addresses, but I have no idea how to even conceptually think of that.
Any help would be great, this is a new concept to me and I HAVE to figure it out very soon or I will be forced to switch to a chip other than PSoC.. which I really do not want to do since I love PSoC.