SPI slave component TX what? when buffer is empty | Cypress Semiconductor
SPI slave component TX what? when buffer is empty
I have a SPI slave component (obviously talking to some master...) which is part of a command interface.
The slave normally has less data than commands received...
SPI(UDB) full duplex slave has software buffers rx&tx enabled (size=64)
My simple question is basically: how do i define the standard reply data when no data is available to transfer from slave to master.
I would like to define txdata = 0x00 by default when no data is available to transfer to master. In my communication language this is a NOP.
(yes: i can do counting incoming bytes and making sure the tx-buffer is always filled to same amount...)
isn't there an elegant solution based on bufferEmpty of FIFOempty status?
status now: i see repeats of 'earlier' data from fifo of txbuffer...
any help is welcome ...