SPI Communication | Cypress Semiconductor
I posted my question in the other forum but got no answer.
The problem was I 'm trying to make 2 PSoC chip communicate via SPI.
PSoC5LP as master and the PSoC4 as slave.
The problem is, MISO line (P0_2) of the PSoC5 seem to pull the pin low.
I have change the pin to P3_0 and everything works as expected.
Can anyone explained what happened?is P0_2 (Opamp ) input cannot be buffered?