PSOC5LP: I2S clarification | Cypress Semiconductor
PSOC5LP: I2S clarification
Can anyone help clarify my understanding of the I2S block? The advanced tab allows the number of channels to be set for both RX and TX. However simply setting RX to 4 channels chnages the block such that SDI is now marked up as sdi[1:0]. The console then warns that 'Terminal "I2S_1.sdi[1:0]" with width 2 is connected to "Net_105" with width 1.' with terminal and its connected wire do not have the same width.
Does this imply that a multichannel I2S block is effectively N stereo pairs in parallel rather than a true serial TDM mode?
FWIW I'm trying to establish if I can use one of these M0 or M3 parts to convert multi-channel serial audio to SPI.