Simple question - 48 MHz is maximal clock frequency for UDB ?
No, the UDB can also be clocked with the maximum bus clock. But depending on how you configure it, the maximum frequency can be slower (e.g. for the counters it depends on the bit depth).
Max bus frequency is same like arm core frequency 67 MHz ?
My idea is very simple verilog VGA controller.
The Creator timing analyzer will flag you if you have a
problem with routes/timing.
Depending on the chip you use the max. Frequency is 80MHz
I raise to 80.02 MHz :) (probably needs hydrogen cooling)
Thanks help all
My VGA project working fine - 50MHz PLL and about 20% UDB resorces :-)