PSoC 5 - ADC & -050 Dev Kit | Cypress Semiconductor
PSoC 5 - ADC & -050 Dev Kit
I noticed that the latest ADC requires external bypassing on pin 0 or 0 to reach its full speed of 700 KSPS (dropped from the earlier advertised 1MSPS?) However, on the -050 DVK, the hardware schematics depict the connection of the decoupling capacitors at pin 0 or 3. Cypress support, are you aware of this?