could anyone help me with the verilog implementation of the PArallel in serial out shift register in datapath
I already posted a verilog solution to you in your last thread. Have a look here http://www.cypress.com/?app=forum&rID=69759
Are you looking from something that is specifically using the datapath? Does it need a parallel hardware load?
If so, have a look at the base shifter provided in the component library
Hard to find these some time, on my computer it is here:
C:\Program Files (x86)\Cypress\PSoC Creator\2.1\PSoC Creator\psoc\content\CyComponentLibrary\CyComponentLibrary.cylib\BShiftReg_v2_10