From the filter component output to a custom verilog block via DMA | Cypress Semiconductor
From the filter component output to a custom verilog block via DMA
At the moment I am trying to move data from the Filter block output ( the normal one not the one that can be programmed in asm) to a custom Verilog block via DMA and without intervention of the CPU in a PSoC5LP.
I was wondering: 1) is this possible at all? 2) in case it is, could you point me to application notes/examples that could serve as inspiration? If anybody could provide me with an example in which a Verilog block receives data via DMA I could probably take it from there.
Thanks for the help