FIFO to sample 8 or 16 bitParallel Inputs | Cypress Semiconductor
FIFO to sample 8 or 16 bitParallel Inputs
Just went through the blog written by Bradley Budlong. I would recommend you to go through it.
FIFO to capture 8 / 16 bit data parallely and buffer to a depth of level 4. This component can be used to capture fast switching parallel data.
The library file given in the blog has to be modified a bit for PSoC 5LP. I am attaching the modified file with a example project with this post.
I am also attaching the document which will assist you if you face any error while linking the library files.