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Direct Memory Access in PSoC®3 and PSoC®5 | Cypress Semiconductor

Direct Memory Access in PSoC®3 and PSoC®5

Summary: 1 Reply, Latest post by Gautam Das on 20 Nov 2011 02:27 AM PST
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David Ron's picture
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PSoC®3 and PSoC®5 devices feature a Direct Memory Access (DMA) engine, which can used for data transfer between on-chip elements without any CPU intervention. The DMA engine is part of a high performance bus known as the peripheral hub (PHUB). The PHUB is a programmable and configurable central bus backbone within PSoC3/PSoC5 devices that ties the various on-chip system elements together. It consists of multiple spokes; each spoke is connected to one or more peripheral blocks.

The DMA with the help of Transaction Descriptors (TD) can move data from a source to destination at very high speeds. The TDs can be chained together to perform complex data transfers. The following diagram illustrates a simple data transfer using DMA.

The key features of PSoC® 3 and PSoC® 5 DMA are:

  • 24 DMA channels
  • Each channel has one or more Transaction Descriptors (TDs) to configure channel behavior. Up to 128 total TDs can be defined
  • TDs can be dynamically updated
  • Eight levels of priority per channel
  • Any digitally routable signal, the CPU, or another DMA channel, can trigger a transaction
  • Each channel can generate up to two interrupts per transfer
  • Transactions can be stalled or canceled
  • Supports transaction size of infinite or 1 to 64k bytes
  • TDs may be nested and/or chained for complex transactions

Please refer AN52705 - PSoC® 3 and PSoC 5 - Getting Started with DMA for information on different ways to configure the DMA channel and TD to perform data transfers. The application note also has example projects and a brief video.

dasg's picture
Cypress Employee
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ALo, to get the latest news on PSoC, follow the PSoC Insiders Blog.

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