can I implement a diferential amplifier using the op amps in the analogue part of PSOC?
I have read the different op amps topologies (the two and three topologies). is it possible in some way to implement the differential amplifier using 1 op amp?
You may use the PGA as differential amplifyer when selecting Vref as external. The output will be
Vout = (Vin - Vref) ' Gain
To stay within the limits of Vss - Vdd you might bias your Vin appropiately.
If you are trying to make a true diff amp, matched gain thru both signal
in paths, PGA would not be the answer. Ie. you need to reject CM signals.
The topology would look like -
There is a ton of reference material on web analyzing resistor matching and errors for
If your needs are more inline with an IA see attached ap note.
This is a useful reference -
One last, if DiffAmp is feeding a DelSig ADC component, the ADC has a diff
front end, with gain settings up to 8.
Actually the front end of the delsig ADC component is very versatile and can give very high sensitivity without the need for any front end amplification. If you look at the configure screen for the component, you'll see that you can select both a basic input range and also an additional buffer gain capability. Use both of these and it'll take you up to a full scale sensitivity of +/-8mV without additional components (the maximum sample rate falls as the sensitivity increases). For many applications you'll actually get better performance if you don't use additional PGAs or opamps at the front end.
If you want an amplifier with differential input and high common mode rejection to a single-ended analogue output that you need elsewhere in the system, then you'll probably need external gain setting resistors. There's one exception: it's possible to make a diff-in, s/e-out amplifier with no external resistors, high input impedance, reasonable CMRR and a differential gain of 2x just using two PGAs. Working out how to do that is normally something I would leave as a homework assignment (-8b
The PGA gain accuracy is +/- 10% at a G = 50, +/- 8% at G = 16, there is
not going to be much CMRR in a design like that.
An analysis of CMRR -