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Datapath A0 register | Cypress Semiconductor

Datapath A0 register

Summary: 3 Replies, Latest post by cnkz on 13 Jul 2016 01:25 PM PDT
Verified Answers: 1
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user_463311141's picture
30 posts

I'm trying to setup a 16-bit DMA transfer to my custom component.  I think I have the DMA transferring data properly to a data path A0 register.  How do I read the value in A0 from within the verilog code for my component?

user_1377889's picture
9300 posts

Again: In the "Component Author Guide" chapter 6.4 you will find the names of the registers to use.



user_14586677's picture
7646 posts

Some useful ref material on DMA -                                             AN52705     Getting Started with DMA                          AN84810     PSoC® 3 and PSoC 5LP Advanced DMA Topics                AN61102 PSoC® 3 and PSoC 5LP - ADC Data Buffering Using DMA     Videos on DMA Videos on DMA (some overlap)


Regards, Dana.

cnkz's picture
12 posts

I think the correct answer is: You can not access the accumulator registers (or any data path register) from verilog.

Because the component author guide says:

...a datapath can contain up to 6 outputs regardless of the data width...

These status signals are generated from comparisons and internal logic in the datapath and do not include data bits directly from the registers or the ALU. It is possible however to access this information by using the shifter to serially shift out the bits in the ALU.


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