You are here

DAC Error Calculations | Cypress Semiconductor

DAC Error Calculations

Summary: 1 Reply, Latest post by danaaknight on 26 Jun 2014 05:22 AM PDT
Verified Answers: 0
Last post
Log in to post new comments.
user_366036678's picture
41 posts



I'm not sure if this is the right place to ask about this,


I'm currently trying to use a DAC + OpAmp (acting as a voltage buffer) to source a hopefully stable enough bias voltage (Vbias) used in a thermistor application (sort of like AN66477).


I'm currently trying to evaluate the impact of the component errors on Vbias, and I did go thru the datasheet for the DAC and found out all the characteristics.


One problem is that I'm not quite sure how it should be written down in an equation.


Any ideas?

user_14586677's picture
7646 posts

The errors you would be concerned about -


1) DAC linearity, gain error, tempco, PSRR, offset, Zout loading effects

2) Opamp offset, PSRR, gain error, offset tempco


Normally you take each parameter and convert it to LSBs,or ppm, then add them all up.

In case of noise added as RMS. Since DAC is only 8 bits, probably drop PSRR

as a consideration.


Some parameters not available, so that complicates a compete error analysis.

The you have complicating this an AC analysis if that is of concern.


Attached some useful references (more than you want to read).


Regards, Dana.

Log in to post new comments.