Count7 signal question | Cypress Semiconductor
Count7 signal question
I'm implementing a UDB design with a "Count7" as a bit counter. I have Reset, Enable and Load signals to tie into my state machine. I have read the following in the datasheet:
"load - Input. Synchronous active high load signal. Present if enabled.... ....The load signal has no effect if the counter is disabled.".
Does this mean I have to have the counter software and hardware enabled for the load signal to work?