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configurable analogue blocks | Cypress Semiconductor

configurable analogue blocks

Summary: 2 Replies, Latest post by mahmoud on 10 Jan 2013 01:28 PM PST
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user_255488079's picture
121 posts

 a simple question, I understand the concept of PLDs (programmable logic devices) but how can an analogue block be configured?? I am not asking about how to do it in PSOC creator but rather on the technology that creates the block.

user_255488079's picture
121 posts

 thanks Dana

user_14586677's picture
7646 posts

I will give this a try.


Analog is generally speaking founded on sw cap technologies or on continuous time

amplifier surrounded by gain and offset setting elements. So for example a PGA type

element consists of a gain block amd muxes controlling feedback R's. The gain

block may have its bias set via a muxed R, which in term controls GBW, slew rate,

etc.. Offsets, by this I mean common mode offsetting, done by another ladder terminated

in a reference of some kind. Ratios of R's or absolute values are meaningful depending

on architecture.


In the case of sw cap technologies, you are adding capacitors and clocking as a means of control.

Classic case is simple switch feeding a cap, and Z becomes a f(F,C), see -



so we add clock rate to the control toolbox. And substitute C for R in some cases.



Regards, Dana.

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