Clock Recovery | Cypress Semiconductor
I am working on a clock recovery design using edge detection method by capturing the rising and falling edges and sampling using a counter configured in the down count and up count respectively. I have a PRS generator generating random numbers and the positive and negative edge detectors to produce the pulse on the falling edges. then the counter is used to count the samples.
This is an example i adapted from www.twyman.org.uk/clock_recovery/#simulation
How do i go about extracting the clock from here. Find attached the snapshots. The green wave is measured at the Down-clock digital outpu and the blue is the control_signal (clock_1).
I need to understand how i will extract the clock.