Can someone please help me dissect this DMAC register address in detail? | Cypress Semiconductor
Can someone please help me dissect this DMAC register address in detail?
All: I'm looking for VERY specific info/answers, not generalities here. Per HLI's lead, I went and looked at the Sensei blog, and way back in '09 , he did a project using Indexed DMA. Basically, the first TD loads an address into the second TD, and the second TD then moves the actual data where it needs to go. You can consider it a dynamically configured DMA, which is FAR, FAR more powerful and useful in my opinion than a static DMA.
Okay, from that project, I find that he uses the following destination address for the TD DMA register:
1) First question: is the DMA config memory configured as a struct? If so, where can we find a prototype of this struct so that we can understand the elements within it?
2) Why do we see this mix of upper and lower case? Surely there is some sort of method behind the madness of this lexigraphy/syntax.