3.3V IO voltage with external regulation mode with PSoC5LP | Cypress Semiconductor
3.3V IO voltage with external regulation mode with PSoC5LP
I would like to use external regulation mode where 1.8V is applied directly to VccA and VccD, while also operating the VddIOx at 3.3V (or greater)
However, the datasheet states (sec 6.2 Power System) that in this case, VddA and VddD *should* be connected to VccA ad VccD. If this is done, it then seems that VddIO *must* be connected to 1.8V, correct?
What happens if VddD and VddA are instead connected to 3.3V? Is it possible to disable the votlage regulators?
My design needs 3.3V IOs - is it possible to use external regulation?