Write to Flash upsets clock frequency | Cypress Semiconductor
Write to Flash upsets clock frequency
After much debugging, I've finally stumbled upon what was causing parts of my code to not operate correctly all of the time. It seems that when I write to flash on my 4100 BLE chip, it was causing two issues:
1. For a brief period after the write to flash, my UART TX/RX was getting screwed up and I was seeing a buch of gibberish on my terminal screen. I believe this was because the clock driving the UART, which is derived from the HFCLK, was being impacted, which meant my baud rate was out of whack briefly
2. Also, for a brief period after the write to flash, my PWM signal, which was also driven off a clock signal derived from the HFCLK, was in turbo mode and seemed to be operating at about 10 times the frequency I was wanting it to.
In both cases, my HFCLK was derived from the IMO.
Is this sort of behaviour to be expected when writing to flahs? I'm not sure how stable the IMO is supposed to be and what's the best way to get around it. In the short term I'm just shifting my write to flash code to a point in time where the UART and PWM aren't being used, or aren't critical to operation of the hardware, but I'd like to understand what the root cause is and how I can get around it.
Can anyone provide any comments/advice?