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What to do about low battery condition. | Cypress Semiconductor

What to do about low battery condition.

Summary: 6 Replies, Latest post by Bob Marlowe on 12 Oct 2016 10:41 AM PDT
Verified Answers: 1
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AndyWarne's picture
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73 posts

As we know, these chips dont have any Low Voltage Detection (which is a poor omission IMHO).

In a device which has a built-in battery, care needs to be taken to ensure the code does not get stuck when the battery gets low, meaning that the device still will not operate when the battery is charged again.

Its possible to implement a battery voltage monitor by using an ADC but this does not seem to be a very reliable method, and seems wasteful of battery power to do this check on a regular basis. The device would need to be woken the the check made and put to sleep again if still OK.

I am wondering what others have done, Is it reliable to simply rely on the watchdog timer, or would there be timing holes during which the watchdog would not fire and reset the code if it crashes owing to low battery? I am not sure what exactly happens to the CPU when a low voltage condition exists. Maybe there is no need to worry about this situation at all.

Or does the radio drop out first? Any thoughts welcome.

 

 

user_1377889's picture
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9606 posts

Could be easier to use a low power comparator and a global signal component. This combination will wakeup from deep sleep.

 

Bob

AndyWarne's picture
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Thats interesting, I had a look at the "Global Signal Component" by placing it and there is a selection in this called "Power System Interrupt" so it appears the chip does have LVD after all. Its well hidden in the documentation though but I will investigate this further.

I am sure I have not seen any mention of this in the datasheet.

cjoachim_1597296's picture
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The PSoC® 4 BLE Registers Technical Reference Manual (TRM) has actually a lot of low level documentation: http://www.cypress.com/documentation/technical-reference-manuals/psoc-41...

(I remember I've seen the abbreviation LVD there without having any knowlegde about it)

user_1377889's picture
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Speedycat, I never red the registers trm and I am not willing to do that. But you can see from the PSoC4 BLE Family Datasheet that there is an LVD integrated into the system.

 

Bob

AndyWarne's picture
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I have now found bits of information dotted about on this subject.

As far as I can tell, LVD is not much use for this purpose. Its not like LVD on other Cypress families which resets the chip when low voltage is detected. It issues an interrupt. In order to handle this the system needs to be awake. So the LVD is pro-active only.

There appears to be another feature named Brownout Detection though, which is mentioned in the TRM. It does state that it resets the chip. It does not give much info, what voltage it trips at, whether it can be enabled/disabled etc. But it seems safe to assume this is always enabled as there is no register in the Register TRM which covers it. So this should do the job.  

user_1377889's picture
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9606 posts

When using the Global Signal Reference the system does not to be active, see datasheet. The component uses the PICU which can wakeup the device from deep sleep.

 

Bob

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