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Hidden component pins | Cypress Semiconductor

Hidden component pins

Summary: 3 Replies, Latest post by jbright_1593366 on 03 Aug 2016 01:08 PM PDT
Verified Answers: 1
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sego's picture
43 posts

There are many components which have hidden pins. One of them is I2C/UART/SPI

I've discovered, that these pins are predefined appropriately to schematic, And Tx pin is configured, as output.

For me it's logic and makes sense that pins are configured during component start, and unconfigured during stop.

Because I wanted to have different output pin configuration for this component, "windows-schematic style" programming damaged 2 external circuits, until I realized what's going on.

I was working before on nrf51 and can't get used to assumptions during programming, which I haven't done, can't change, and not aware of

user_14586677's picture
7646 posts

The routability of PSOC is not perfectly general, there are constraints, discussed

in these docs -                                                   AN86439 - PSoC® 4 - Using GPIO Pins     AN57821 - PSoC® 3, PSoC 4, and PSoC 5LP Mixed Signal Circuit Board Layout Considerations     AN94020 - Getting Started with PRoC™ BLE     AN91267 - Getting Started with PSoC® 4 BLE


Curious, what were you driving externally that caused device damage ?


Regards, Dana.


user_1377889's picture
9279 posts

The pins are made "hidden" because they are associated with a dedicated IO-port which is not changeable. Setting the pin's properties (as far as they do not conflict with the component's requirements) can be made using the definitions made in the component_pins.h-file, just have a look into that.



jbright_1593366's picture
12 posts

Is there a way to create schematic objects for these hidden pins so we can connect them to other PSoC components?

The datasheet describes them as "I/O connections buried (not exposed) at the symbol level"

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