Contrary specifications about Uart FIFO register, which one is right? | Cypress Semiconductor
Contrary specifications about Uart FIFO register, which one is right?
By PSoC® 4 BLE Architecture Technical Reference Manual (TRM), a RX interrupt is generated when "RX FIFO has less entries than the value specified by TRIGGER_LEVEL in SCB_RX_FIFO_CTRL". But PSoC® 4 BLE Register Technical Reference Manual (TRM) specify the Trigger level bits of the SCB_RX_FIFO_CTRL register as "TRIGGER_LEVEL Trigger level.When the receiver FIFO has more entries than the number of this field, a receiver trigger event is generated.Default value is 0." Which one is the truth? And what does the "entry" refer to? An occupied location or a free location?