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What ADC status reg mean? | Cypress Semiconductor

What ADC status reg mean?

Summary: 2 Replies, Latest post by hli on 13 Feb 2014 04:07 AM PST
Verified Answers: 0
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sego's picture
43 posts

low 5 bits show which channel was scanned. My result is always 2.

Is it bit value or integer.

if bit than there is no room for all 8 channels

If integer what vale has channel 0

user_1377889's picture
9300 posts

The API only states that there is a value of "NonZero" returned when there are samples availlable. There is no documentation about status and channel association. Where did you get your infos from?



user_78878863's picture
2553 posts

According to the description in the PSoC4 Registers TRM, the CUR_CHAN bits are only valid when the status is BUSY (meaning when a conversion is in progress).

It looks like the SAR_CHAN_WORK_VALID / SAR_CHAN_RESULT_VALID register is what you need (see the Architecture TRM, page 209 for more about that).

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