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UART and silicon revision | Cypress Semiconductor

UART and silicon revision

Summary: 1 Reply, Latest post by danaaknight on 27 Jul 2015 03:16 AM PDT
Verified Answers: 1
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Dennis Nielsen's picture
3 posts

Hi all,

I am having a very strange problem with UART communication, and I have spent a lot of time trying to find a reason for it. I am using the UART component (v2.5 and PSoC Creator 3.2) in full duplex, with flow control enabled and only the 4 byte hw buffer.

I have just made a new batch of my pcb and none of them are doing what they are supposed to do. Fortunately I had 2 older PSoC4's laying around for an older prototype, and mounting them on the PCB works just fine. There naming is "CY8C4245AXI-483 1431 A 04" and the none working units have "CY8C4245AXI-483 1525 C 32".

Anyone of you had similar problems? any critical silicon change that im unaware of? I know this is a risky judgment, but it is currently where I am, my design is pretty mature. 

It is like the UART hw buffers simply is not working the same way anymore. If I enable software buffer I see better behavior, but it is not an option for me right now. And I would like an explanation for this phenomenon.

Thanks in advance.




user_14586677's picture
7646 posts

I recommend you file a CASE right away on this -


To create a technical or issue case at Cypress -


“Technical Support”

“Create a Case”


You have to be registered on Cypress web site first.


Regards, Dana.

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