Here is the project:
What do you expect to happen? you are writing asynchronously about every 10 ms a new value into the compare-register while the PWM runs with a period of 10,000Hz / 101 = 99,01 Hz = 10.1 ms. So from time to time when the difference becomes important something is going to happen, especially when you write a zero or a 100 into the PWMs.
Many thanks for your quick replay and your analysis. After some thoughts, I understand, that this effect is a kind of interference of the two nearly same time periods of updates and PWM basic frequency. Still very strange is, that the pause time is around 130 mS, means 13 PWM periods.
But my test case was not realistic, in practise the speed control will not be so frequently.