Can anyone please share the references to the concept of soft interrupts in general and in relation to PSoC4? Thanks in advance.
What do you understand by "soft interrupt"? When you think of an interrupt triggered by software and not by a hardware signal there are some differences. The hardware signal has to be removed before the interrupt handler exits, or the interrupt will be fired and handled again. This is not needed for sw induced interrupts.
These might help -
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You are not referring to this as software ISR ?
SPC block is responsible for flash write operations through SROM. It triggers an interrupt when the flash write
operation is complete.