SCB1 Register Address Map Missing in Documents | Cypress Semiconductor
SCB1 Register Address Map Missing in Documents
I'm fairly new to the PSoC architecture so I expect some frustration learing a new part. I've programmed PIC, Intel, Zilog, and Motorola microcontrollers in the past and they all have their learning curves and documentation issues. This is not a slam in any way as I'm just pointing out something that created some confusion to me when learning this device.
I'm working on a program that uses the SCB UART funtionality on a CY8CKIT-049-42xx board. so I was poking around trying to learn the register locations. I see on page 23 of the PSoC 4 Architecture TRM (Rev C 3/25/2014) that there are two SCBs. When I look at page 50 I see that the SCB registers are mapped to addresses 0x40060000-0x4006FFFF. I then go to the PSoC 4 Registers TRM (Rev A 6/25/2013) to actually look at the individual register definitions and I see the registers mapped in that address space, but there is no indication of two SCBs. So I compile a simple program in PSoC Creator and I hunted around in the include files and find that in the cydevice_trm.h file the SCB1 register address map appears to be 0x40070000-0x4007FFFF. This range is not even defined in the PSoC 4 Architecture TRM.
While I'm OK with finding this information out in a rather reverse engineering way, it would be a lot clearer if the documentation was updated to reflect the full picture especially with regards to registers in the device. I would rather not have to rely on compiled code to understand the register mappings. If I missed some errata document out there my apologies, and I would appreciate a link to it for my documentation collection.
I do like the PSoC devices though and look forward to using these devices in future projects.