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PSoC BLE + SPI Master Code example | Cypress Semiconductor

PSoC BLE + SPI Master Code example

Summary: 5 Replies, Latest post by richard.seymour_1538281 on 30 Dec 2015 02:48 PM PST
Verified Answers: 1
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This is my 1st project using PSoC BLE, I need help setting up the SPI code.. can't find any SPI example code for the PSoC BLE.

user_1377889's picture
9294 posts

Welcome in the forum, Richard.

Use the SPI examples for PSoC4, the essentials are the same.



Thanks Bob, 

The following seems to work.. 



Setting up the CYBLE 022001-00 21 SMT for SPI on the following ports:

P1.6 SPI_1:ss0_m

P0.4 SPI_1:mosi

P0.5 SPI_1:miso

P1.7 SPI_1: sclk

I get the following error when assigning the UART to P1.4/5 rx/tx  as per the PCB !  ( but no errors when assigned to p3.4/5 )

Digital Placement ...
Error: plm.M0046: E2809: Unable to find a valid placement for pins and fixed-function blocks. See the Digital Placement's Detailed placement messages section in the report file for details.
Error: plm.M0046: E2055: An error occurred during placement of the design.
Error: plm.M0046: "D:\Program Files (x86)\Cypress\PSoC Creator\3.3\PSoC Creator\bin/sjplacer.exe" failed (0x00000001)
Dependency Generation ...
Clean Temporary Files ...
Error: cdf.M0005: CyDsFit aborted due to errors, please address all errors and rerun CyDsFit. (App=cydsfit)
--------------- Build Failed: 12/28/2015 10:00:24 ---------------


Also there is a workaround a bit too deep at the moment !! below :


The placer is not able to place all of the carry chains without backtracking. It fills one UDB bank to 15/16 and the other to 7/8 and cannot place the final 2-datapath chain. As a workaround, add a control file to the TopDesign component (in Workspace Explorer's Components tab) with the following lines: ATTRIBUTE placement_force OF \Timer_ADPActiveTime:TimerUDB:sT16:timerdp:u0\ : LABEL IS "U(2,0)"; ATTRIBUTE placement_force OF \Timer_OutputPeriod:TimerUDB:sT24:timerdp:u0\ : LABEL IS "U(3,1)"; ATTRIBUTE placement_force OF \Timer_OutputActiveTime:TimerUDB:sT24:timerdp:u0\ : LABEL IS "U(0,1)"; This will fill the datapaths in the second UDB bank and allow the placer to assign the remaining datapaths.

user_1377889's picture
9294 posts

Consider to post your complete project, so that we all can have a look at all of your settings To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.

PSoC4 port 4 and higher have limited routing capabilities. Use fixed-function components with dedicated pins preferably from UDB components which are more versatile.






Thanks for your help  Bob,  I raised a ticket with tech support .. all sorted now..



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