PSoC 42xx SPI Slave Timing Issues | Cypress Semiconductor
PSoC 42xx SPI Slave Timing Issues
I am having some issues using a PSoC 42xx as a SPI slave and was hoping someone here may be able to offer input on my issue and how to resolve it. A coworker and I are using PSoCs to create a series of motor drivers all controlled by a Cortex-M3 and communicating over SPI. I started with a basic echo SPI project where the slave echoes what the master says to it just to prove that I can get SPI to work as expected.
After much experimenting and finally getting a logic analyzer I found part of the problem. The PSoC's timing is off in the SCB Slave module. I configured it as a Motorola MODE0 SPI device, and the Master is set this way as well. MODE0 is set such that the data is sampled on the rising edge of the SCK pin and data is usually propagated on the falling edge. It looks like the PSoC is propagating the data on the rising edge and holding it stable on the falling edge. I tried all the other SPI modes on the PSoC while keeping the Master at MODE0 and it did not result in a working solution.
I have attached images from the logic analyzer, PSoC creator, and my COM port monitor and can include additional files upon request. Any assistance would be appreciated. Thank you.
COM Port Monitor connected to the SPI Master. I'm using an AVR since the M3 board is not ready as of yet. The Master recieves the data and acknowledges the decimal value. Then it breaks the value into bytes (this is only 16bit) and prints the bytes that will be sent. Upon receiving the response it prints the recieved bytes in the order received. This one does not show the issue as badly as the one below but it persists.
Just to show that I am running in Motorola MODE0
First byte from the Master
Second byte from the Master
First byte from PSoC, you can see that is got the correct value but is unable to respond properly.
Second byte from the PSoC
First byte from Master:
Second byte from Master:
First byte from PSoC:
Second byte from PSoC: