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Printf garbage characters at 24Mhz | Cypress Semiconductor

Printf garbage characters at 24Mhz

Summary: 2 Replies, Latest post by Bob Marlowe on 29 Jul 2015 02:59 PM PDT
Verified Answers: 1
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AndyWarne's picture
73 posts

I am using the Debug Printf UART functionality on a BLE Pioneer board.

This works properly if SYSCLK is set to 48Mhz. If its set to 24Mhz many of the displayed characters are garbage.

Has anyone else noticed this?

user_14586677's picture
7646 posts

Sounds like baud rate changed ? Would a clean and build recalculate

the divisors ? Not sure.


Can you see bit timing changed with a scope ?


Regards, Dana.

user_1377889's picture
9250 posts

I would suggest to check the clock accuracy in the clock view of the .cydwr-file. This may show different values for different system clock settings.



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