Hysteresis on comparator - anyway to increase this in software? | Cypress Semiconductor
Hysteresis on comparator - anyway to increase this in software?
The built in comparators within the PSoC4 chips can be configured with hysteresis, but this is internally set to 10mV.
I'm trying to do a simple level crossing detection using an analog input, a comparator and the IDAC with external resistor, but due to the noise associated with the input signals (I suspect there is a bit of noise on the voltage generated by the IDAC, as well as on my incoming AC signal), I'm getting a series of pulses around the transition point, rather than a clean positive going signal.
Ideally, I'd like to increase the amount of hysteresis so that I can avoid this problem. The only idea I have really been able to come up with is to adjust the IDAC value as the first step in my ISR using IDAC_8bit_SetValue() so that once I've serviced the ISR, and released control back to the main loop, there is a larger voltage difference between the two signals on the comparator inputs. At some suitable point afterwards, I then have to set it back to its normal value (I'm measuring a 100Hz signal, so I should have plenty of time to reset the IDAC value back prior to the next occurrence of my level crossing).
I've tried this, and it certainly improves things, but I'm still not getting a nice clean signal on the output of my comparator.
Has anyone ever been able to improve on the default 10mV of hystersis without resorting to having a hardware comparator or putting some brute force filtering on the input signal?