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How to distinguish back-to-back I2C slave writes in a single buffer? | Cypress Semiconductor

How to distinguish back-to-back I2C slave writes in a single buffer?

Summary: 1 Reply, Latest post by Prem Sai on 10 Sep 2014 08:16 AM PDT
Verified Answers: 0
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andyturk's picture
10 posts

Suppose you're implementing an I2C slave and you have a sufficiently large receive buffer to hold several transactions worth of data. What is the preferred method for figuring out where one transaction stops and the next one starts?

E.g., when you have an auto-increment style slave command where the master terminates the command with an I2C stop condition, how can you recognize the stop condition outside of the ISR?

There's a _customIntrHandler() hook in the slave ISR, but it's not clear to me how to use it for this purpose.

Prem Sai's picture
Cypress Employee
13 posts

Hi Andy,


As you mentioned, you can try using the customIntrHandler to run a function during I2C interrupts by the below steps:


1) Use "SetCustomInterruptHandler() " API to call a function that is to be run on I2C interrupts.

2) In this function, check if the I2C interrupt is due to a stop condition, by using the "GetSlaveInterruptSource" API.

But to ensure that I2C stop condition is an interrupt source for I2C, you can use a statement such as below:

I2CS_SetSlaveInterruptMode(I2CS_GetSlaveInterruptMode() | I2CS_INTR_SLAVE_I2C_STOP);


Also, if your requirement is only to re-initialize the write-buffer after each I2C transaction, then you can consider using EZI2C mode, where the I2C master needs to send the base address of buffer(from where read/write operations start) in each I2C transaction. An example project is available for PSoC4 EzI2C in PSoC Creator.


Thanks & Regards,

Prem Sai

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